DS1254WB-150【PDF 14/17 页】IC NVSRAM 16MBIT 150NS 168BGA

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DS1254

6 of 17

AM/PM/12/24 MODE

Bit 7 of the hours register is defined as the 12-hour or 24-hour mode select bit. When high, the 12-hour mode is

selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the

second 10-hour bit (20–23 hours).

OSCILLATOR BIT

Bit 5 of the day register controls the oscillator. When set to logic 1, the oscillator is off. When set to logic 0, the

oscillator turns on and the watch becomes operational.

ZERO BITS

Registers 1, 2, 3, 4, 5, and 6 contain one or more bits that will always read logic 0. When writing these locations,

either a logic 1 or logic 0 is acceptable.

BATTERY MONITORING

The DS1254 automatically monitors the battery in an attached DS3800 battery cap on a 24-hour time interval. Such

monitoring begins within tREC after VCC rises above VPF and is suspended when power failure occurs.

After each 24-hour period has elapsed, the battery is connected to an internal 1M

test resistor for one second.

During this one second, if the battery voltage falls below the battery-voltage trip point (~2.6V), the battery warning

output

BW is asserted. Once asserted, BW remains active until the attached DS3800 battery cap is replaced.

However, the battery is still retested after each VCC power-up, even if it was active on power-down. If the battery

voltage is found to be higher than ~2.6V during such testing,

BW is de-asserted and regular testing resumes. BW

has an open-drain output driver.

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